Test MP+dmb.sy+addr-pos-[fr-rf]-ctrl-addr

AArch64 MP+dmb.sy+addr-pos-[fr-rf]-ctrl-addr
"DMB.SYdWW Rfe DpAddrdR PosRR FrLeave RfBack DpCtrldR DpAddrdR Fre"
Cycle=Rfe DpAddrdR PosRR FrLeave RfBack DpCtrldR DpAddrdR Fre DMB.SYdWW
Relax=
Safe=Rfe Fre PosRR DMB.SYdWW DpAddrdR DpCtrldR [FrLeave,RfBack]
Prefetch=0:x=F,0:y=W,1:y=F,1:x=T
Com=Rf Fr Rf
Orig=DMB.SYdWW Rfe DpAddrdR PosRR FrLeave RfBack DpCtrldR DpAddrdR Fre
{
0:X1=x; 0:X3=y;
1:X1=y; 1:X4=z; 1:X8=a; 1:X11=x;
2:X1=z;
}
 P0          | P1                    | P2          ;
 MOV W0,#1   | LDR W0,[X1]           | MOV W0,#1   ;
 STR W0,[X1] | EOR W2,W0,W0          | STR W0,[X1] ;
 DMB SY      | LDR W3,[X4,W2,SXTW]   |             ;
 MOV W2,#1   | LDR W5,[X4]           |             ;
 STR W2,[X3] | LDR W6,[X4]           |             ;
             | CBNZ W6,LC00          |             ;
             | LC00:                 |             ;
             | LDR W7,[X8]           |             ;
             | EOR W9,W7,W7          |             ;
             | LDR W10,[X11,W9,SXTW] |             ;
Observed
    z=1; y=1; x=1; 1:X6=0; 1:X5=1; 1:X3=1; 1:X10=1; 1:X0=1;
and z=1; y=1; x=1; 1:X6=1; 1:X5=0; 1:X3=1; 1:X10=1; 1:X0=1;
and z=1; y=1; x=1; 1:X6=0; 1:X5=0; 1:X3=1; 1:X10=1; 1:X0=1;
and z=1; y=1; x=1; 1:X6=0; 1:X5=0; 1:X3=1; 1:X10=0; 1:X0=1;
and z=1; y=1; x=1; 1:X6=0; 1:X5=1; 1:X3=1; 1:X10=1; 1:X0=0;
and z=1; y=1; x=1; 1:X6=1; 1:X5=0; 1:X3=1; 1:X10=1; 1:X0=0;
and z=1; y=1; x=1; 1:X6=0; 1:X5=0; 1:X3=1; 1:X10=1; 1:X0=0;
and z=1; y=1; x=1; 1:X6=0; 1:X5=1; 1:X3=1; 1:X10=0; 1:X0=0;
and z=1; y=1; x=1; 1:X6=1; 1:X5=0; 1:X3=1; 1:X10=0; 1:X0=0;
and z=1; y=1; x=1; 1:X6=0; 1:X5=0; 1:X3=1; 1:X10=0; 1:X0=0;